High-speed serial buses like PCI Express provide a foundational bus standard for high performance storage systems. These storage systems based on high performance non-volatile memory (NVM) media require large number of I/O queues, deep I/O queues, and exploitation of parallelism.
Field programmable gate array (FPGA) based controllers for NVM media offer flexibility, especially when the NVM media is based on emerging technology. However, FPGAs have limited memory space for the large and deep I/O queues required for these bus standards.